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W9412G6IH
V DD Q
V IH min (AC)
V SWING (MAX)
V SS
V REF
V IL max (AC)
T
T
Output
SLEW = (V IH min (AC) - V IL max (AC)) / T
Notes:
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
Conditions outside the limits listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
All voltages are referenced to V DD , V DDQ. ( 2.5V ± 0.1V for DDR500 )
Peak to peak AC noise on V REF may not exceed ± 2% V REF(DC).
V OH = 1.95V, V OL = 0.35V
V OH = 1.9V, V OL = 0.4V
The values of I OH(DC) is based on V DDQ = 2.3V and V TT = 1.19V.
The values of I OL(DC) is based on V DDQ = 2.3V and V TT = 1.11V.
These parameters depend on the cycle rate and these values are measured at a cycle rate with the minimum values
of t CK and t RC .
V TT is not applied directly to the device. V TT is a system supply for signal termination resistors is expected to be set
equal to V REF and must track variations in the DC level of V REF .
These parameters depend on the output loading. Specified values are obtained with the output open.
(10) Transition times are measured between V IH min(AC) and V IL max(AC) .Transition (rise and fall) of input signals have a fixed
slope.
(11) IF the result of nominal calculation with regard to T ck contains more than one decimal place, the result is rounded up to
the nearest decimal place.
(i.e., t DQSS = 0.75 × t CK , t CK = 7.5 nS, 0.75 × 7.5 nS = 5.625 nS is rounded up to 5.6 nS.)
(12) V X is the differential clock cross point voltage where input timing measurement is referenced.
(13) V ID is magnitude of the difference between CLK input level and CLK input level.
(14) V ISO means {V ICK (CLK)+V ICK ( CLK )}/2.
(15) Refer to the figure below.
Publication Release Date: Sep. 16, 2009
- 28 -
Revision A06
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